Lecturing at the International Summer School on TeV Energy Experimental Physics at the Institute of High Energy Physics in Beijing

It was an honour to lecture at the first International Summer School on TeV Energy Experimental Physics at the Institute of High Energy Physics in Beijing.  Rolf Heuer, the CERN Director General, issued a congratulatory message to the organisers. Greetings from Beijing. 

See below a group picture. One can see an impressive growth in the number of students interested in High-Energy Physics in China. Most of the students were advanced undergraduate and first/second year graduate students taking courses. This is great news for the development of a robust high-energy physics community in China. This is very encouraging in the light of China's plans to build a new accelerator.

The students enjoyed nice facilities with state-of-the-art equipment. In addition to lectures students went through tutorials. This picture was taken towards the end of the school. The vast majority of the students stayed in the school till the end. Discussions were fun.

Gave the experimental Higgs lectures and the experimental summary on searches for non-SUSY physics beyond the Standard Model. It was nice to see students ask good questions and to see the genuine interest in the subject. 

Optimal Compiler Flags for ARM

ARM GCC FLAGS

To get a good approximation for the ideal set of gcc flags to use on ARM, COREMARK was compiled and run several times with different flag combinations. I used 16 different combinations with what I assumed were the most important generic flags (Please leave a comment if you know of any other flags I should include!). Below is an example for the Cortex-A7. A similar set of flags was used for the A9 and A15.

Example of flag combinations for the Cortex-A7

I chose coremark for four reasons. One, it is supported by ARM and suggested as the embedded benchmark of choice. Two, it is easily compiled and allows easy configuration. Three, it does not use external libraries so the flags have an affect. Four, the benchmark generates random data during the test so no work is optimised away by the compiler,

Results for different flag combinations for A7, A9 and A15.

Listed below are the flags that were found to be the best. (Generally between 6-10% improvement).

A7    : -O3 -mfpu=neon-vfpv4 -march=armv7-a -mtune=cortex-a7
A9    : -O3 -mfpu=neon         -march=armv7-a
A15  : -O3 -mfpu=neon-vfpv4 -march=armv7-a

A sanity check on my runs found that the iterations I was using in CoreMark was fair for each board. This can be seen by the plateau that is reached by each board. 

Iteration count vs performance. 10s run time was adequate to reach a plateau.

WandAdapter 2.0 Complete

I have finally got around to taking some photos of the "completed" WandAdapter 2.0. Check them out below! I have yet to test the performance of the boards Ethernet and PCI-Express - but as soon as I do I'll post some results.

I plan on releasing the designs under an open source license soon - stay tuned!

WandAdapter 2.0 with attached Wandboard

Linux /usr/include Proper Permissions

I recently broke the permissions in my /usr/include folder - probably whilst copying new include files into the directory. None of my compiles seemed to be working out as they should have been...

I did a little research and found out what they should be. I've written the commands to execute below for my own future reference and in the hope that someone else finds use in them!

sudo su -
cd /usr/include
find . -type d -exec chmod 755 {} \;
find . -type f -exec chmod 644 {} \;
chown -R root:root /usr/include/*

NVIDIA Tegra K1 Development Board Arrived

Today our first sample NVIDIA Jetson TK1 development board arrived! This was a pleasant surprise since I was unaware that one had finally been shipped! Thanks NVIDIA!


The board is larger than I expected and has many great features. With a powerful ARM Cortex-A15 quad core CPU, 2 GB RAM and a 192 core Kepler GPU (that apparently can perform at ~350 GFLOPS single precision), this SoC is going to be great fun to benchmark and hopefully use in later research... Watch this space!

Wandboard SSD Stand

I decided that my development Wandboard needed a stand, as opposed to it lying on an anti-static mat at random angles. I 3D printed a simple plastic piece that also allowed me to attach a fast Corsair 60 GB SSD for SATA benchmarks and faster builds. A quick dd test gives me 113 MB/s write speed! Check the pictures below!

I plan to install Debian with a GUI, along with Eclipse, to do kernel development natively. This should make writing and debugging ARM-based drivers a much simpler exercise! The issue is that Eclipse only has a Debian ARM 'port' and does not have any Ubuntu or Arch variants. I will probably try to get it working on Linaro but only time will tell...

WandAdapter 2.0 Nearing Completion

I finally received the raw PCBs for what I call the WandAdapter 2.0! I'll be soldering over the next few days and hopefully it powers up and works! My concerns are, as always, the high speed signals for the PCI-Express (or PCIe), PCI-Express clock, USB and Ethernet. The board was simulated with Mentor Graphics HyperLynx so everything should work...

The idea behind this board is to connect a Wandboard to a standard PCIe x1 connector for true EndPoint operation. All of the important signals for PCIe have been routed to the Wandboard such as the external clock, wake, reset and of course the data! The board breaks out USB host and device (OTG) as well as gigabit Ethernet and debug UART.

One issue I have noticed so far is that the PCIe present pins (one short gold one is visible at the bottom) unfortunately has a track routed down which was used for the hard gold plating process. For future production runs, it's a good idea to route this signal to the edge of the board so that it doesn't have to be scratched off manually. What's the point of a short pin when it's as long as all the rest?

I'll be posting photos of the completed board soon for some eye candy!