WandAdapter 2.0 Nearing Completion

I finally received the raw PCBs for what I call the WandAdapter 2.0! I'll be soldering over the next few days and hopefully it powers up and works! My concerns are, as always, the high speed signals for the PCI-Express (or PCIe), PCI-Express clock, USB and Ethernet. The board was simulated with Mentor Graphics HyperLynx so everything should work...

The idea behind this board is to connect a Wandboard to a standard PCIe x1 connector for true EndPoint operation. All of the important signals for PCIe have been routed to the Wandboard such as the external clock, wake, reset and of course the data! The board breaks out USB host and device (OTG) as well as gigabit Ethernet and debug UART.

One issue I have noticed so far is that the PCIe present pins (one short gold one is visible at the bottom) unfortunately has a track routed down which was used for the hard gold plating process. For future production runs, it's a good idea to route this signal to the edge of the board so that it doesn't have to be scratched off manually. What's the point of a short pin when it's as long as all the rest?

I'll be posting photos of the completed board soon for some eye candy!